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Elevator VHDL: About

ELEVATOR VHDL SIMULATION PROJECT

In my Logic System Design II (LSDII) course we were assigned a final course project to develop an elevator control panel simulator in separate groups.


The purpose was to understand the circuit logic of the signals that are used to control an elevator to go up, down, stop, etc. We were given a month to design the simulator using the basic knowledge we had of the programming language called “Very High Speed Integrated Circuit (VHSIC) Hardware Design Language (HDL),” or more commonly known as VHDL.


First, we had to propose a project timeline, design ideas, and to designate what role each member of our group would have. I naturally fell into the role as group coordinator. I started planning our first meeting so we could delegate the work that needed to get done.


From the get go, a lot of my personality demonstrated a high tendency of extroversion by asserting myself as the group’s leader (Goldberg).


On our second meeting we brainstormed further on the ideas we had first proposed trying to break down the steps needed to create a scalable program that could be used to simulate many floors and not just a fixed amount. Throughout each brainstorm session I was sure to be open to allow my teammates the chance to have plenty of input.


This was my attempt at being more of a Transformational leader than a Transactional leader (Burns). I waited for the proper times to suggest changes rather than saying an idea, getting feedback, and proposing another idea. I didn’t want to be too assertive and seem like a micromanaging leader.


I was demonstrating a high tendency of agreeableness by trusting my teammates to drive the project forward with me rather than just being the only one to hold the reins (Goldberg).


Having a better understanding that leadership is situational and this specific scenario required a leader that allowed the team to create something together rather than to command my teammates I came close to realizing Fiedler’s Contingency theory without knowing about it at the time (Fiedler).


Our final code was not entirely successful but it did get us a B as a grade for it. Coming into the class as a Math major, my professor joked at the end and said he approved my staying in the Computer Engineering department thanks to my effort. I felt extremely proud and this moment has continued to push me to seek leadership roles in my courses since.


I want to absorb as much experience as possible so in the future I have knowledge to best confront a project since each project will be different (Fiedler).

Elevator VHDL: About
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